Table of Contents
1Scope
2Introduction
3Definitions
4GeneralDescriptionoftheDigitalParallelInterface
4.1LogicalDescription
4.2MasterClockandReset
4.3Timing,TimeslotsandCapacity
4.4Resetprocedure
5Hardwareimplementation
5.1Connectortype,pinassignmentandcabling
5.2Linedriversandreceivertermination
5.3Distributedmultiplexer
5.4Signaldelayswithindevices
AnnexADPIimplementationusingTTLlogicintegrated
circuits
AnnexBDataformats
B.1Timesignals
B.2Codedbitstream
AnnexCRulesforcodecimplementation
AnnexDExamplehostlaboratorytestconfigurations
AppendixITheITU-T8kbit/sspeechcodectestparallel
interface
I.1Specialisationoftheinterface
I.2Dataformats
References Abstract
Describes a 16-bit parallel input and output interface for the interconnection of test and reference devices in ITU-T standardisation activities.