ARINC 485-2:2003
ARINC 485-2:2003 Cabin Equipment Interfaces (cei) - Part 2: Physical Layer - In-seat Protocol Specifies the ARINC 485-control protocol used by the LRUs described in ARINC Specification 628 Part 2. Also defines a multi-drop bus.
Table of Contents
1.0INTRODUCTION1.1Purpose
1.2ApplicableDocuments
1.3Scope
1.4Architecture
2.0BUSDESCRIPTIONANDPROTOCOL
2.1PhysicalLayer
2.2DataLinkLayer
2.2.1ByteFormat
2.2.2Messageformat
2.2.2.1Type1MessageDefinition
2.2.2.2Type2MessageDefinition
2.2.2.3Type3MessageDefinition
2.2.3LocalAddress
2.2.4BusTiming
2.2.4.1LowSpeedBusTiming
2.2.5BusControlTransferMechanism
2.2.6BusInitialization
2.2.6.1SlavePower_Up
2.2.6.2MasterPower_Up
2.2.7NormalOperation
2.2.8PointtoPointOnly
2.3NetworkLayer
2.3.1NetworkLayer-Traditional
2.3.2NetworkLayer-InternetProtocolBased
2.3.2.1ExampleofType2MessageExchange
2.4TransportLayer
3.0GENERALBUSOPERATION
3.1DefaultData
3.2MandatoryMessageList
3.3OptionalMessageList
4.0OPTIONALMODESOFOPERATION
4.1Introduction
4.1.1Decompression
4.1.2MaintenanceFunctions
4.1.2.1ContinuousMonitor
4.1.2.2ConfigurationRequest
4.1.2.3LRUFilenameRequest
4.1.2.4BITE
4.1.2.5DataLoad
4.2FlowControl
4.3Invalid_Message
4.4PowerControlCommandResponse
4.5LoadManagementMeasurement
5.0LRUCOMMONCOMMANDS
5.1Introduction
5.2Power_Control_State(PCS)
5.3LRUStatusResponse(RLS)
5.4New_Status-Change(NSC)
6.0LRUSPECIFICATIONSCOMMANDS
6.1InSeatPowerSupplyUnit(ISPSU)Commands
6.1.1ISPSUType1Messages
6.1.2ISPSUType2Messages
6.1.3ISPSUType3Messages
6.1.3.1ISPSUCommand_2Descriptions
6.1.3.2LRU_Status_Response(RLS)
6.1.3.3New_Status_Change(NSC)
6.1.3.4Power_Management_State(PMS)
6.1.3.5Power_Outlet_State(POS)
6.1.4ISPSUStatusTable
6.2ElectronicControlUnit(ECU)Commands
6.2.1ECUType1Messages
6.2.2ECUType2Messages
6.2.3ECUType3Messages
6.2.3.1ECUCommand_2Descriptions
6.2.3.2LRU_Status_Response(RLS)
6.2.3.3New_Status_Change(NSC)
6.2.3.4Power_Management_Response
6.2.3.5Power_Configuration(PCF)
6.2.3.6Power_Actuator_Response(PAR)
6.2.3.7Power_Actuator_Control(PAC)
6.2.4ECUStatusTables
6.2.4.1ECUStatus:Allbitswhenset
are"1","Spare"isalways"0"
6.2.4.2ECUSACSStatus:Allbitswhen
setare'1'"Spare"isalways"0"
6.2.4.3ECUISPSUStatus:AllBitswhen
setare'1'"Spare"isalways"0"
Appendices
AListofAcronyms
BSeatPeripheralStatus
ARINCStandard-ErrataReport
ARINCIAProjectInitiation/Modification(APIM)